This leads to the necessity of new RF frontend concepts leveraging reconfigurable RF integrated circuits based on “digital-intensive” building blocks like sampling or sub-sampling receivers and RF-DAC or PWM based power amplifiers (Digital power amplifiers – DPA). Especially for future massive MIMO multi-antenna systems the co-existence problems and self-interference leakage will create significant performance limitations that needs to be improved by self-interference cancellation, typically implemented by digital base-band signal processing or preferably directly in the RF domain. Especially for MIMO systems, an efficient digital data communication to a “digital” transmitter and from a direct sampling receiver is nowadays a challenge which is researched in the RFFE-Lab. In addition, a strong functional diversification of semiconductor devices happened during past years moving from scaling driven system-on-chip (SoC) integration to heterogeneous integration concepts like system-in-package (SiP).
The traditionally separated fields of RFIC design, RFMW design, high-speed serial data links and heterogeneous integration of RF components should be merged in this research lab. An optimized modelling and chip-package-board co-design together with new partitioning of RF frontend topologies, chip-to-chip communication and RF self-interference cancelation are necessary requirements for realization of future multi-band, multi-frontend massive MIMO systems.