About RFFE Lab
Merging RFIC design, RFMW design and
Miniaturization demands and increasing functionality of modern integrated communication are facing numbers of challenges like
- Strong interference between the different RF frontends
- Strong interaction between the RF integrated circuits, external RF components and the antenna
- High complexity of RF frontends due to increasing number of frequency bands signal bandwidths moving to higher and higher carrier frequencies
- Digital-intensive RF/mmWave massive MIMO frontends require efficient and fast data interfaces
- Limitations of available power, chip area, PCB area and mainly costs.
This leads to the necessity of new RF frontend concepts leveraging reconfigurable RF integrated circuits based on “digital-intensive” building blocks like sampling or sub-sampling receivers and RF-DAC or PWM based power amplifiers (Digital power amplifiers – DPA). Especially for future massive MIMO multi-antenna systems the co-existence problems and self-interference leakage will create significant performance limitations that needs to be improved by self-interference cancellation, typically implemented by digital base-band signal processing or preferably directly in the RF domain. Especially for MIMO systems, an efficient digital data communication to a “digital” transmitter and from a direct sampling receiver is nowadays a challenge which is researched in the RFFE-Lab. In addition, a strong functional diversification of semiconductor devices happened during past years moving from scaling driven system-on-chip (SoC) integration to heterogeneous integration concepts like system-in-package (SiP).
The traditionally separated fields of RFIC design, RFMW design, high-speed serial data links and heterogeneous integration of RF components should be merged in this research lab. An optimized modelling and chip-package-board co-design together with new partitioning of RF frontend topologies, chip-to-chip communication and RF self-interference cancelation are necessary requirements for realization of future multi-band, multi-frontend massive MIMO systems.
Focusing on our
We will research and realize world-class, multi-band, multi-standard RF frontend solutions for future communication like 5G/6G massive MIMO communication systems with power efficient high-speed baseband digital data interfaces.
Objective
The massive growing complexity of future wireless communication RF frontends requires new multidisciplinary modelling, circuit design and integration concepts. This lab is researching
- Innovative “digital intensive” wireless frontends for upcoming multi-transceiver systems (eg. 5G/6G massive MIMO communication)
- Strong focus on co-design and co-optimization of 1) monolithic integrated RF circuits in CMOS technologies, 2) RF frontend modules (SOI or SiGe HBT technologies, GaN) together with 3) modern heterogeneous and hybrid integration concepts like eWLB package or RF panel level packaging and PCB embedding.
- New concepts of high-speed serial data links for System-in-Package (SiP) chip-to-chip and on-chip communication with wireline or optical links (photonic RF/mmWave frontends).
Expected Results
- Proof of concept of new RF frontend topologies, architectures and circuits
- Realization of important IP building blocks for RF frontends
- By co-design and co-optimization of RF integrated circuits, wafer level packaging and silicon-interposers technologies we will realize performance, area and power optimized RF frontends for future massive MIMO systems including digitally assisted RF concepts for self-interference cancellation, pre-distortion or selective beamforming.
- New concepts for power efficient digital data interfaces (eg. full-duplex serial links)
For all mentioned research topics the chip – package – board co-design in heterogeneous / hybrid integrated More-than-Moore systems is a fundamental know-how enabling area, power and performance optimized RF front-end solutions.